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特許 権利維持 A pixel output line (14) is set for each pixel (10) arranged two-dimensionally in pixel regions (2a, 2b), and a storage unit (20) is connected to the pixel output lines (14) extended to storage regions (3a, 3b). The storage unit (20) comprises a write-side transistor (21), a read-side transistor (22), and a storage section (24) that retains signals from 104 frames. All of the pixels simultaneously accumulate photoelectric charge and output signals generated by the photoelectric charge accumulation to the pixel output lines (14).