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特許 権利維持 In order to obtain substantially identical operation speed of a p-type MOS transistor and n-type MOS transistor constituting the CMOS circuit, the n-type MOS transistor has a three-dimensional structure having channel regions on both of the (100) surface and the (110) surface and the p-type MOS transistor has a planer structure having a channel region only on the (110) surface.
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