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Semiconductor device

Patent Granted The present invention provides a semiconductor device. In order to obtain substantially identical operation speed of a p-type MOS transistor and n-type MOS transistor constituting the CMOS circuit, the n-type MOS transistor has a three-dimensional structure having channel regions on both of the surface (100) and the surface (110) and the p-type MOS transistor has a planer structure having a channel region only on the surface (110).

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